1. Field of the Invention
Embodiments of the invention relate generally to semiconductor devices and methods of manufacturing semiconductor devices. More particularly, embodiments of the invention relate to semiconductor devices having punch-through prevention patterns adapted to prevent punch-through defects and related methods of manufacture.
This application claims the benefit of Korean Patent Application No. 2005-50167 filed on Jun. 13, 2005, the subject matter of which is hereby incorporated by reference in its entirety.
2. Description of the Related Art
Many semiconductor devices, such as static random access memory (SRAM) devices to choose one specific example, comprise a substrate and a channel pattern formed in some portion of the substrate. The channel pattern is usually very thin.
It is common to form the channel pattern by applying a thermal treatment process to the substrate. Since many substrates are formed from silicon, the applied thermal treatment process will produce a channel pattern comprising single crystalline silicon. For example, a substrate containing an amorphous silicon layer when thermally treated will form a single crystalline silicon layer. The single crystalline silicon layer may then be patterned to form a channel pattern. Thus, channel patterns formed from single crystalline silicon layers are quite common in contemporary semiconductor devices.
In order to function with any degree of usefulness, a channel pattern typically requires some electrical connected. One common connection technique uses a contact hole to make electrical contact with the channel pattern through an overlaying insulation layer. This insulation layer may be selectively etched to form the contact hole. However, the contact hole formation process may inadvertently etch the channel pattern as well as the insulation layer, and in so doing expose a portion of the substrate proximate (e.g., below) the channel pattern. This phenomenon will be generically will referred to “punch-through defect.” Such defects cause excessive leakage current, and the electrical characteristics of the semiconductor device are generally degraded accordingly.
One approach to the prevention of punch-through defects suggests increasing the thickness of the channel pattern. However, increasing the channel pattern thickness will correspondingly increase the amount of time required to effect the associated thermal treatment process. Additionally, a thicker channel pattern may adversely affect the conversion of an amorphous silicon into single crystalline silicon.